#module = task2seq;
#scope: task2seq (2 signals, 0 logic)
tri unsigned input [8] in1
reg unsigned output [8] z
#endscope task2seq
#scope: task2seq.Addseq2 (4 signals, 0 logic) task task2seq.Addseq2
#begin
#assign 
task2seq.Addseq2.x
+
task2seq.Addseq2.a
task2seq.Addseq2.b
#end 
#assign 
task2seq.Addseq2.z
+
task2seq.Addseq2.x
1
#end 
#end
reg unsigned input [8] a
reg unsigned input [8] b
reg unsigned [8] x
reg unsigned output [8] z
#endscope task2seq.Addseq2
#scope: task2seq.Subseq2 (4 signals, 0 logic) task task2seq.Subseq2
#begin
#assign 
task2seq.Subseq2.y
-
task2seq.Subseq2.c
task2seq.Subseq2.d
#end 
#assign 
task2seq.Subseq2.z
-
task2seq.Subseq2.y
2
#end 
#end
reg unsigned input [8] c
reg unsigned input [8] d
reg unsigned [8] y
reg unsigned output [8] z
#endscope task2seq.Subseq2
#always
#begin
#begin
#assign 
task2seq.Addseq2.a
task2seq.in1
#end 
#assign 
task2seq.Addseq2.b
6
#end 
#assign 
task2seq.z
task2seq.Addseq2.z
#end 
#end
#begin
#assign 
task2seq.Subseq2.c
task2seq.z
#end 
#assign 
task2seq.Subseq2.d
5
#end 
#assign 
task2seq.z
task2seq.Subseq2.z
#end 
#end
#assign 
task2seq.z
+
task2seq.z
task2seq.in1
#end 
#end
