#module = loopsum;
#scope: loopsum (4 signals, 0 logic)
reg unsigned [8] i
reg unsigned output [8] r
tri unsigned input [8] v
reg unsigned [8] x
#endscope loopsum
#always
#begin
#assign 
loopsum.x
loopsum.v
#end 
#begin
#assign 
loopsum.i
0
#end 
#while
#comp
<
loopsum.i
100
#begin
#assign 
loopsum.x
+
loopsum.x
1
#end 
#assign 
loopsum.i
+
loopsum.i
1
#end 
#end
#endwhile
#end
#assign 
loopsum.r
loopsum.x
#end 
#end
