module dlatch (
   d,
   db,
   req,
   rst,
   q,
   qb,
   done
);

   input d;
   input db;
   input req;
   input rst;
   output q;
   output qb;
   output done;
   wire inter1;
   wire inter2;

   NA2 I0 (req, d, inter1);
   NA2 I1 (req, db, inter2);
   NA2 I2 (inter1, qb, q);
   NA3 I3 (inter2, rst, q, qb);
   AN22 I4 (inter1, q, inter2, qb, done);
endmodule

