module SRsetAND2rseset_V (
   s1,
   s2,
   s_ack,
   r,
   r_ack,
   out
);

   input s1;
   input s2;
   output s_ack;
   input r;
   output r_ack;
   output out;
   wire w1;
 
   ON21 I0 (s1, s2, w1, out);
   NA2 I1 (out, r, w1);
   AO21 I2 (s1, s2, in, s_ack);
   OR2 I4 (out, r, r_ack);
endmodule


