#LyX 1.3 created this file. For more info see http://www.lyx.org/
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\layout Title

Advanced PN2DCs
\layout Author

a behaviour-level synthesis tool 
\layout Section

Commands
\layout Itemize

syn-tool.exe mapping multi-nets to hardware circuits including datapath and
 control.
\layout Standard

Usage:
\layout Standard

syn-tool.exe io-file global-net-file local-net-file datapath-net-file
\layout Standard

or
\layout Standard

just type in syn-tool.exe
\layout Standard

the tool ask you to type in the related input files and output files.
\layout Section

Input Files
\layout Itemize

io file: obtained from the verisyn tool.
 it contains input/output information and variable (register) information;
\layout Itemize

global-net file: obtained from the verisyn tool.
 it contains main control specification in Petri nets.
\layout Itemize

datapath-net file: obtained from the verisyn tool.
 It contains datapath specifications in coloured Petri nets.
\layout Itemize

local-net file: obtained from the verisyn tool.
 It contains the connections between the global-net and the datapath-net.
 The connections are specified in Petri nets.
\layout Standard

More details about the above files can be found in the verisyn tool package.
\layout Section

Output Files
\layout Standard

The tool may generate several output files.
 One file is the gate-level netlist.
 The other files depend on the tool and the library supplied.
 If a function part cannot be synthesized by the tool, a verilog specification
 is generated and passed to a existing synthesis tool.
 One file is generated for each unsynthesized function part.
 The prototype pn2dcs tool does not have this property.
\layout Standard

the following is an example of the netlist in the prototype pn2dcs tool.
\layout Standard


\emph on 
DCsetreset_0 1
\layout Standard


\emph on 
Pin 1 I1bk_I5r11
\layout Standard


\emph on 
Pin 2 ra_d4
\layout Standard


\emph on 
Pin 3 c1
\layout Standard


\emph on 
Pin 4 I2bk_I1r11_I4r11
\layout Standard


\emph on 
DCsetOR2resetOR2_0 2
\layout Standard


\emph on 
Pin 1 I2bk_I1r11_I4r11
\layout Standard


\emph on 
Pin 2 ddc3
\layout Standard


\emph on 
Pin 3 d1_d1
\layout Standard


\emph on 
Pin 4 c2
\layout Standard


\emph on 
Pin 5 I3bk_I2r11
\layout Standard


\emph on 
Pin 6 I5bk_I2r12
\layout Standard


\emph on 
DCsetreset_0 3
\layout Standard


\emph on 
Pin 1 I3bk_I2r11
\layout Standard


\emph on 
Pin 2 cmp_ca1
\layout Standard


\emph on 
Pin 3 c3
\layout Standard


\emph on 
Pin 4 I4bk_I3r11
\layout Standard


\emph on 
DCsetreset_0 4
\layout Standard


\emph on 
Pin 1 I4bk_I3r11
\layout Standard


\emph on 
Pin 2 d3_d3
\layout Standard


\emph on 
Pin 3 ddc3
\layout Standard


\emph on 
Pin 4 I2bk_I1r11_I4r11
\layout Standard


\emph on 
DCsetreset_0 5
\layout Standard


\emph on 
Pin 1 I5bk_I2r12
\layout Standard


\emph on 
Pin 2 cmp_cb1
\layout Standard


\emph on 
Pin 3 c4
\layout Standard


\emph on 
Pin 4 I1bk_I5r11
\layout Standard


\emph on 
buff 6
\layout Standard


\emph on 
Pin 1 c1
\layout Standard


\emph on 
Pin 2 c1a
\layout Standard


\emph on 
buff 7
\layout Standard


\emph on 
Pin 1 c1
\layout Standard


\emph on 
Pin 2 c1b
\layout Standard


\emph on 
buff 8
\layout Standard


\emph on 
Pin 1 c1
\layout Standard


\emph on 
Pin 2 c1c
\layout Standard


\emph on 
buff 9
\layout Standard


\emph on 
Pin 1 c1
\layout Standard


\emph on 
Pin 2 c1d
\layout Standard


\emph on 
buff 10
\layout Standard


\emph on 
Pin 1 c3
\layout Standard


\emph on 
Pin 2 c3a
\layout Standard


\emph on 
buff 11
\layout Standard


\emph on 
Pin 1 c3
\layout Standard


\emph on 
Pin 2 c3b
\layout Standard


\emph on 
buff 12
\layout Standard


\emph on 
Pin 1 c3
\layout Standard


\emph on 
Pin 2 c3c
\layout Standard


\emph on 
buff 13
\layout Standard


\emph on 
Pin 1 c3
\layout Standard


\emph on 
Pin 2 c3d
\layout Standard


\emph on 
buff 14
\layout Standard


\emph on 
Pin 1 c3
\layout Standard


\emph on 
Pin 2 c3e
\layout Standard


\emph on 
buff 15
\layout Standard


\emph on 
Pin 1 c4
\layout Standard


\emph on 
Pin 2 c4a
\layout Standard


\emph on 
buff 16
\layout Standard


\emph on 
Pin 1 c4
\layout Standard


\emph on 
Pin 2 c4b
\layout Standard


\emph on 
buff 17
\layout Standard


\emph on 
Pin 1 c4
\layout Standard


\emph on 
Pin 2 c4c
\layout Standard


\emph on 
c2 18
\layout Standard


\emph on 
Pin 1 d1_d1
\layout Standard


\emph on 
Pin 2 d1a
\layout Standard


\emph on 
Pin 3 d1d
\layout Standard


\emph on 
buff 19
\layout Standard


\emph on 
Pin 1 d3e
\layout Standard


\emph on 
Pin 2 d3_d3
\layout Standard


\emph on 
c3 20
\layout Standard


\emph on 
Pin 1 d1d
\layout Standard


\emph on 
Pin 2 c1d
\layout Standard


\emph on 
Pin 3 v1
\layout Standard


\emph on 
Pin 4 v2
\layout Standard


\emph on 
c3 21
\layout Standard


\emph on 
Pin 1 d3e
\layout Standard


\emph on 
Pin 2 c3e
\layout Standard


\emph on 
Pin 3 v1
\layout Standard


\emph on 
Pin 4 v2
\layout Standard


\emph on 
buff 22
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[7]
\layout Standard


\emph on 
buff 23
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[7]
\layout Standard


\emph on 
buff 24
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[6]
\layout Standard


\emph on 
buff 25
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[6]
\layout Standard


\emph on 
buff 26
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[5]
\layout Standard


\emph on 
buff 27
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[5]
\layout Standard


\emph on 
buff 28
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[4]
\layout Standard


\emph on 
buff 29
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[4]
\layout Standard


\emph on 
buff 30
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[3]
\layout Standard


\emph on 
buff 31
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[3]
\layout Standard


\emph on 
buff 32
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[2]
\layout Standard


\emph on 
buff 33
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[2]
\layout Standard


\emph on 
buff 34
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p1[1]
\layout Standard


\emph on 
buff 35
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p1_bar[1]
\layout Standard


\emph on 
buff 36
\layout Standard


\emph on 
Pin 1 DCasyncvalue1
\layout Standard


\emph on 
Pin 2 p1[0]
\layout Standard


\emph on 
buff 37
\layout Standard


\emph on 
Pin 1 DCasyncvalue0
\layout Standard


\emph on 
Pin 2 p1_bar[0]
\layout Standard


\emph on 
dlatch 38
\layout Standard


\emph on 
Pin 1 p1[7]
\layout Standard


\emph on 
Pin 2 p1_bar[7]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[7]
\layout Standard


\emph on 
Pin 6 a_bar[7]
\layout Standard


\emph on 
Pin 7 a_done[7]
\layout Standard


\emph on 
dlatch 39
\layout Standard


\emph on 
Pin 1 p1[6]
\layout Standard


\emph on 
Pin 2 p1_bar[6]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[6]
\layout Standard


\emph on 
Pin 6 a_bar[6]
\layout Standard


\emph on 
Pin 7 a_done[6]
\layout Standard


\emph on 
dlatch 40
\layout Standard


\emph on 
Pin 1 p1[5]
\layout Standard


\emph on 
Pin 2 p1_bar[5]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[5]
\layout Standard


\emph on 
Pin 6 a_bar[5]
\layout Standard


\emph on 
Pin 7 a_done[5]
\layout Standard


\emph on 
dlatch 41
\layout Standard


\emph on 
Pin 1 p1[4]
\layout Standard


\emph on 
Pin 2 p1_bar[4]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[4]
\layout Standard


\emph on 
Pin 6 a_bar[4]
\layout Standard


\emph on 
Pin 7 a_done[4]
\layout Standard


\emph on 
dlatch 42
\layout Standard


\emph on 
Pin 1 p1[3]
\layout Standard


\emph on 
Pin 2 p1_bar[3]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[3]
\layout Standard


\emph on 
Pin 6 a_bar[3]
\layout Standard


\emph on 
Pin 7 a_done[3]
\layout Standard


\emph on 
dlatch 43
\layout Standard


\emph on 
Pin 1 p1[2]
\layout Standard


\emph on 
Pin 2 p1_bar[2]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[2]
\layout Standard


\emph on 
Pin 6 a_bar[2]
\layout Standard


\emph on 
Pin 7 a_done[2]
\layout Standard


\emph on 
dlatch 44
\layout Standard


\emph on 
Pin 1 p1[1]
\layout Standard


\emph on 
Pin 2 p1_bar[1]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[1]
\layout Standard


\emph on 
Pin 6 a_bar[1]
\layout Standard


\emph on 
Pin 7 a_done[1]
\layout Standard


\emph on 
dlatch 45
\layout Standard


\emph on 
Pin 1 p1[0]
\layout Standard


\emph on 
Pin 2 p1_bar[0]
\layout Standard


\emph on 
Pin 3 c1a
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 a[0]
\layout Standard


\emph on 
Pin 6 a_bar[0]
\layout Standard


\emph on 
Pin 7 a_done[0]
\layout Standard


\emph on 
done_8 46
\layout Standard


\emph on 
Pin 1 a_done[7:0]
\layout Standard


\emph on 
Pin 2 d1a
\layout Standard


\emph on 
c2 47
\layout Standard


\emph on 
Pin 1 addm1addm2
\layout Standard


\emph on 
Pin 2 addm1
\layout Standard


\emph on 
Pin 3 addm2
\layout Standard


\emph on 
add2_8 48
\layout Standard


\emph on 
Pin 1 adda[7:0]
\layout Standard


\emph on 
Pin 2 adda_bar[7:0]
\layout Standard


\emph on 
Pin 3 addb[7:0]
\layout Standard


\emph on 
Pin 4 addb_bar[7:0]
\layout Standard


\emph on 
Pin 5 addm1addm2
\layout Standard


\emph on 
Pin 6 U48_add2_8[7:0]
\layout Standard


\emph on 
Pin 7 U48_add2_8_bar[7:0]
\layout Standard


\emph on 
Pin 8 U48_add2_8_done
\layout Standard


\emph on 
dlatch 49
\layout Standard


\emph on 
Pin 1 U48_add2_8[7]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[7]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[7]
\layout Standard


\emph on 
Pin 6 addout_bar[7]
\layout Standard


\emph on 
Pin 7 addout_done[7]
\layout Standard


\emph on 
dlatch 50
\layout Standard


\emph on 
Pin 1 U48_add2_8[6]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[6]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[6]
\layout Standard


\emph on 
Pin 6 addout_bar[6]
\layout Standard


\emph on 
Pin 7 addout_done[6]
\layout Standard


\emph on 
dlatch 51
\layout Standard


\emph on 
Pin 1 U48_add2_8[5]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[5]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[5]
\layout Standard


\emph on 
Pin 6 addout_bar[5]
\layout Standard


\emph on 
Pin 7 addout_done[5]
\layout Standard


\emph on 
dlatch 52
\layout Standard


\emph on 
Pin 1 U48_add2_8[4]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[4]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[4]
\layout Standard


\emph on 
Pin 6 addout_bar[4]
\layout Standard


\emph on 
Pin 7 addout_done[4]
\layout Standard


\emph on 
dlatch 53
\layout Standard


\emph on 
Pin 1 U48_add2_8[3]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[3]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[3]
\layout Standard


\emph on 
Pin 6 addout_bar[3]
\layout Standard


\emph on 
Pin 7 addout_done[3]
\layout Standard


\emph on 
dlatch 54
\layout Standard


\emph on 
Pin 1 U48_add2_8[2]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[2]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[2]
\layout Standard


\emph on 
Pin 6 addout_bar[2]
\layout Standard


\emph on 
Pin 7 addout_done[2]
\layout Standard


\emph on 
dlatch 55
\layout Standard


\emph on 
Pin 1 U48_add2_8[1]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[1]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[1]
\layout Standard


\emph on 
Pin 6 addout_bar[1]
\layout Standard


\emph on 
Pin 7 addout_done[1]
\layout Standard


\emph on 
dlatch 56
\layout Standard


\emph on 
Pin 1 U48_add2_8[0]
\layout Standard


\emph on 
Pin 2 U48_add2_8_bar[0]
\layout Standard


\emph on 
Pin 3 U48_add2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 addout[0]
\layout Standard


\emph on 
Pin 6 addout_bar[0]
\layout Standard


\emph on 
Pin 7 addout_done[0]
\layout Standard


\emph on 
done_8 57
\layout Standard


\emph on 
Pin 1 addout_done[7:0]
\layout Standard


\emph on 
Pin 2 addc
\layout Standard


\emph on 
c2 59
\layout Standard


\emph on 
Pin 1 c3b
\layout Standard


\emph on 
Pin 2 c3c
\layout Standard


\emph on 
Pin 3 c3bc3c
\layout Standard


\emph on 
dele 60
\layout Standard


\emph on 
Pin 1 c3bc3c
\layout Standard


\emph on 
Pin 2 add_dele_ack
\layout Standard


\emph on 
Pin 3 add_dele_req
\layout Standard


\emph on 
Pin 4 addc
\layout Standard


\emph on 
mux2_8 58
\layout Standard


\emph on 
Pin 1 x[7:0]
\layout Standard


\emph on 
Pin 2 x_bar[7:0]
\layout Standard


\emph on 
Pin 3 add_dele_req
\layout Standard


\emph on 
Pin 4 vv[7:0]
\layout Standard


\emph on 
Pin 5 vv_bar[7:0]
\layout Standard


\emph on 
Pin 6 c4ac4b
\layout Standard


\emph on 
Pin 7 addm1
\layout Standard


\emph on 
Pin 8 adda_bar[7:0]
\layout Standard


\emph on 
Pin 9 adda[7:0]
\layout Standard


\emph on 
c2 61
\layout Standard


\emph on 
Pin 1 c4ac4b
\layout Standard


\emph on 
Pin 2 c4a
\layout Standard


\emph on 
Pin 3 c4b
\layout Standard


\emph on 
buff 63
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[7]
\layout Standard


\emph on 
buff 64
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[7]
\layout Standard


\emph on 
buff 65
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[6]
\layout Standard


\emph on 
buff 66
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[6]
\layout Standard


\emph on 
buff 67
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[5]
\layout Standard


\emph on 
buff 68
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[5]
\layout Standard


\emph on 
buff 69
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[4]
\layout Standard


\emph on 
buff 70
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[4]
\layout Standard


\emph on 
buff 71
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[3]
\layout Standard


\emph on 
buff 72
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[3]
\layout Standard


\emph on 
buff 73
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[2]
\layout Standard


\emph on 
buff 74
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[2]
\layout Standard


\emph on 
buff 75
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p5[1]
\layout Standard


\emph on 
buff 76
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p5_bar[1]
\layout Standard


\emph on 
buff 77
\layout Standard


\emph on 
Pin 1 DCasyncvalue1
\layout Standard


\emph on 
Pin 2 p5[0]
\layout Standard


\emph on 
buff 78
\layout Standard


\emph on 
Pin 1 DCasyncvalue0
\layout Standard


\emph on 
Pin 2 p5_bar[0]
\layout Standard


\emph on 
mux2_8 62
\layout Standard


\emph on 
Pin 1 p5[7:0]
\layout Standard


\emph on 
Pin 2 p5_bar[7:0]
\layout Standard


\emph on 
Pin 3 add_dele_req
\layout Standard


\emph on 
Pin 4 a[7:0]
\layout Standard


\emph on 
Pin 5 a_bar[7:0]
\layout Standard


\emph on 
Pin 6 c4ac4b
\layout Standard


\emph on 
Pin 7 addm2
\layout Standard


\emph on 
Pin 8 addb_bar[7:0]
\layout Standard


\emph on 
Pin 9 addb[7:0]
\layout Standard


\emph on 
buff 79
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3[7]
\layout Standard


\emph on 
buff 80
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3_bar[7]
\layout Standard


\emph on 
buff 81
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3[6]
\layout Standard


\emph on 
buff 82
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3_bar[6]
\layout Standard


\emph on 
buff 83
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3[5]
\layout Standard


\emph on 
buff 84
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3_bar[5]
\layout Standard


\emph on 
buff 85
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3[4]
\layout Standard


\emph on 
buff 86
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3_bar[4]
\layout Standard


\emph on 
buff 87
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3[3]
\layout Standard


\emph on 
buff 88
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3_bar[3]
\layout Standard


\emph on 
buff 89
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3[2]
\layout Standard


\emph on 
buff 90
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3_bar[2]
\layout Standard


\emph on 
buff 91
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3[1]
\layout Standard


\emph on 
buff 92
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3_bar[1]
\layout Standard


\emph on 
buff 93
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p3[0]
\layout Standard


\emph on 
buff 94
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p3_bar[0]
\layout Standard


\emph on 
comp_8 95
\layout Standard


\emph on 
Pin 1 p3[7:0]
\layout Standard


\emph on 
Pin 2 p3_bar[7:0]
\layout Standard


\emph on 
Pin 3 x[7:0]
\layout Standard


\emph on 
Pin 4 x_bar[7:0]
\layout Standard


\emph on 
Pin 5 c2
\layout Standard


\emph on 
Pin 6 cmp_great
\layout Standard


\emph on 
Pin 7 cmp_equal
\layout Standard


\emph on 
Pin 8 cmp_less
\layout Standard


\emph on 
OR2 96
\layout Standard


\emph on 
Pin 1 cmp_great
\layout Standard


\emph on 
Pin 2 cmp_equal
\layout Standard


\emph on 
Pin 3 cmp_ca1
\layout Standard


\emph on 
buff 97
\layout Standard


\emph on 
Pin 1 cmp_less
\layout Standard


\emph on 
Pin 2 cmp_cb1
\layout Standard


\emph on 
buff 98
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[7]
\layout Standard


\emph on 
buff 99
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[7]
\layout Standard


\emph on 
buff 100
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[6]
\layout Standard


\emph on 
buff 101
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[6]
\layout Standard


\emph on 
buff 102
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[5]
\layout Standard


\emph on 
buff 103
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[5]
\layout Standard


\emph on 
buff 104
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[4]
\layout Standard


\emph on 
buff 105
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[4]
\layout Standard


\emph on 
buff 106
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[3]
\layout Standard


\emph on 
buff 107
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[3]
\layout Standard


\emph on 
buff 108
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[2]
\layout Standard


\emph on 
buff 109
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[2]
\layout Standard


\emph on 
buff 110
\layout Standard


\emph on 
Pin 1 DCasyncvalue1
\layout Standard


\emph on 
Pin 2 p4[1]
\layout Standard


\emph on 
buff 111
\layout Standard


\emph on 
Pin 1 DCasyncvalue0
\layout Standard


\emph on 
Pin 2 p4_bar[1]
\layout Standard


\emph on 
buff 112
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p4[0]
\layout Standard


\emph on 
buff 113
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p4_bar[0]
\layout Standard


\emph on 
dele 114
\layout Standard


\emph on 
Pin 1 c3a
\layout Standard


\emph on 
Pin 2 mul_dele_ack
\layout Standard


\emph on 
Pin 3 mul_dele_req
\layout Standard


\emph on 
Pin 4 mulc
\layout Standard


\emph on 
mul2_8 115
\layout Standard


\emph on 
Pin 1 p4[7:0]
\layout Standard


\emph on 
Pin 2 p4_bar[7:0]
\layout Standard


\emph on 
Pin 3 vva[7:0]
\layout Standard


\emph on 
Pin 4 vva_bar[7:0]
\layout Standard


\emph on 
Pin 5 mul_dele_req
\layout Standard


\emph on 
Pin 6 mul_DC_mul2_8[7:0]
\layout Standard


\emph on 
Pin 7 mul_DC_mul2_8_bar[7:0]
\layout Standard


\emph on 
Pin 8 mul_DC_mul2_8_done
\layout Standard


\emph on 
dlatch 116
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[7]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[7]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[7]
\layout Standard


\emph on 
Pin 6 vva2_bar[7]
\layout Standard


\emph on 
Pin 7 vva2_done[7]
\layout Standard


\emph on 
dlatch 117
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[6]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[6]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[6]
\layout Standard


\emph on 
Pin 6 vva2_bar[6]
\layout Standard


\emph on 
Pin 7 vva2_done[6]
\layout Standard


\emph on 
dlatch 118
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[5]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[5]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[5]
\layout Standard


\emph on 
Pin 6 vva2_bar[5]
\layout Standard


\emph on 
Pin 7 vva2_done[5]
\layout Standard


\emph on 
dlatch 119
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[4]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[4]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[4]
\layout Standard


\emph on 
Pin 6 vva2_bar[4]
\layout Standard


\emph on 
Pin 7 vva2_done[4]
\layout Standard


\emph on 
dlatch 120
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[3]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[3]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[3]
\layout Standard


\emph on 
Pin 6 vva2_bar[3]
\layout Standard


\emph on 
Pin 7 vva2_done[3]
\layout Standard


\emph on 
dlatch 121
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[2]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[2]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[2]
\layout Standard


\emph on 
Pin 6 vva2_bar[2]
\layout Standard


\emph on 
Pin 7 vva2_done[2]
\layout Standard


\emph on 
dlatch 122
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[1]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[1]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[1]
\layout Standard


\emph on 
Pin 6 vva2_bar[1]
\layout Standard


\emph on 
Pin 7 vva2_done[1]
\layout Standard


\emph on 
dlatch 123
\layout Standard


\emph on 
Pin 1 mul_DC_mul2_8[0]
\layout Standard


\emph on 
Pin 2 mul_DC_mul2_8_bar[0]
\layout Standard


\emph on 
Pin 3 mul_DC_mul2_8_done
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 vva2[0]
\layout Standard


\emph on 
Pin 6 vva2_bar[0]
\layout Standard


\emph on 
Pin 7 vva2_done[0]
\layout Standard


\emph on 
done_8 124
\layout Standard


\emph on 
Pin 1 vva2_done[7:0]
\layout Standard


\emph on 
Pin 2 mulc
\layout Standard


\emph on 
c2 125
\layout Standard


\emph on 
Pin 1 addcc4c
\layout Standard


\emph on 
Pin 2 addc
\layout Standard


\emph on 
Pin 3 c4c
\layout Standard


\emph on 
dlatch 126
\layout Standard


\emph on 
Pin 1 addout[7]
\layout Standard


\emph on 
Pin 2 addout_bar[7]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[7]
\layout Standard


\emph on 
Pin 6 r_bar[7]
\layout Standard


\emph on 
Pin 7 r_done[7]
\layout Standard


\emph on 
dlatch 127
\layout Standard


\emph on 
Pin 1 addout[6]
\layout Standard


\emph on 
Pin 2 addout_bar[6]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[6]
\layout Standard


\emph on 
Pin 6 r_bar[6]
\layout Standard


\emph on 
Pin 7 r_done[6]
\layout Standard


\emph on 
dlatch 128
\layout Standard


\emph on 
Pin 1 addout[5]
\layout Standard


\emph on 
Pin 2 addout_bar[5]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[5]
\layout Standard


\emph on 
Pin 6 r_bar[5]
\layout Standard


\emph on 
Pin 7 r_done[5]
\layout Standard


\emph on 
dlatch 129
\layout Standard


\emph on 
Pin 1 addout[4]
\layout Standard


\emph on 
Pin 2 addout_bar[4]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[4]
\layout Standard


\emph on 
Pin 6 r_bar[4]
\layout Standard


\emph on 
Pin 7 r_done[4]
\layout Standard


\emph on 
dlatch 130
\layout Standard


\emph on 
Pin 1 addout[3]
\layout Standard


\emph on 
Pin 2 addout_bar[3]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[3]
\layout Standard


\emph on 
Pin 6 r_bar[3]
\layout Standard


\emph on 
Pin 7 r_done[3]
\layout Standard


\emph on 
dlatch 131
\layout Standard


\emph on 
Pin 1 addout[2]
\layout Standard


\emph on 
Pin 2 addout_bar[2]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[2]
\layout Standard


\emph on 
Pin 6 r_bar[2]
\layout Standard


\emph on 
Pin 7 r_done[2]
\layout Standard


\emph on 
dlatch 132
\layout Standard


\emph on 
Pin 1 addout[1]
\layout Standard


\emph on 
Pin 2 addout_bar[1]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[1]
\layout Standard


\emph on 
Pin 6 r_bar[1]
\layout Standard


\emph on 
Pin 7 r_done[1]
\layout Standard


\emph on 
dlatch 133
\layout Standard


\emph on 
Pin 1 addout[0]
\layout Standard


\emph on 
Pin 2 addout_bar[0]
\layout Standard


\emph on 
Pin 3 addcc4c
\layout Standard


\emph on 
Pin 4 Reset_signal
\layout Standard


\emph on 
Pin 5 r[0]
\layout Standard


\emph on 
Pin 6 r_bar[0]
\layout Standard


\emph on 
Pin 7 r_done[0]
\layout Standard


\emph on 
done_8 134
\layout Standard


\emph on 
Pin 1 r_done[7:0]
\layout Standard


\emph on 
Pin 2 ra_d4
\layout Standard


\emph on 
mux2_8 135
\layout Standard


\emph on 
Pin 1 v[7:0]
\layout Standard


\emph on 
Pin 2 v_bar[7:0]
\layout Standard


\emph on 
Pin 3 c1c
\layout Standard


\emph on 
Pin 4 vva2[7:0]
\layout Standard


\emph on 
Pin 5 vva2_bar[7:0]
\layout Standard


\emph on 
Pin 6 mul_dele_ack
\layout Standard


\emph on 
Pin 7 vv[7:0]
\layout Standard


\emph on 
Pin 8 vv_bar[7:0]
\layout Standard


\emph on 
Pin 9 v2
\layout Standard


\emph on 
buff 137
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[7]
\layout Standard


\emph on 
buff 138
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[7]
\layout Standard


\emph on 
buff 139
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[6]
\layout Standard


\emph on 
buff 140
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[6]
\layout Standard


\emph on 
buff 141
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[5]
\layout Standard


\emph on 
buff 142
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[5]
\layout Standard


\emph on 
buff 143
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[4]
\layout Standard


\emph on 
buff 144
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[4]
\layout Standard


\emph on 
buff 145
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[3]
\layout Standard


\emph on 
buff 146
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[3]
\layout Standard


\emph on 
buff 147
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[2]
\layout Standard


\emph on 
buff 148
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[2]
\layout Standard


\emph on 
buff 149
\layout Standard


\emph on 
Pin 1 DCasyncValue0
\layout Standard


\emph on 
Pin 2 p2[1]
\layout Standard


\emph on 
buff 150
\layout Standard


\emph on 
Pin 1 DCasyncValue1
\layout Standard


\emph on 
Pin 2 p2_bar[1]
\layout Standard


\emph on 
buff 151
\layout Standard


\emph on 
Pin 1 DCasyncvalue1
\layout Standard


\emph on 
Pin 2 p2[0]
\layout Standard


\emph on 
buff 152
\layout Standard


\emph on 
Pin 1 DCasyncvalue0
\layout Standard


\emph on 
Pin 2 p2_bar[0]
\layout Standard


\emph on 
mux2_8 136
\layout Standard


\emph on 
Pin 1 p2[7:0]
\layout Standard


\emph on 
Pin 2 p2_bar[7:0]
\layout Standard


\emph on 
Pin 3 c1b
\layout Standard


\emph on 
Pin 4 addout[7:0]
\layout Standard


\emph on 
Pin 5 addout_bar[7:0]
\layout Standard


\emph on 
Pin 6 add_dele_ackc3d
\layout Standard


\emph on 
Pin 7 x[7:0]
\layout Standard


\emph on 
Pin 8 x_bar[7:0]
\layout Standard


\emph on 
Pin 9 v1
\layout Standard


\emph on 
c2 153
\layout Standard


\emph on 
Pin 1 add_dele_ackc3d
\layout Standard


\emph on 
Pin 2 add_dele_ack
\layout Standard


\emph on 
Pin 3 c3d
\layout Standard

\SpecialChar ~

\the_end
