Projects
- POETS Project
2016-2021
"Event-based parallel computing - partially ordered event-triggered systems" - PRiME Project
2013-2018
"Power-efficient, Reliable, Many-core Embedded systems" - SAVVIE Project
2012-2016
"Staying alive in variable, intermittent, low-power environments" - UNCOVER Project
2012-2015
"UNderstanding COmplex system eVolution through structurEd behaviouRs" - TrAmS Platform Grant
2012-2016
"Trustworthy Ambient Systems: Resource Constrained Ambience" - Dream Fellowship
2011-2013
"Energy-Modulated Computing" - GAELS Project
2011-2014
"Globally Asynchronous Elastic Logic Synthesis" - Holistic Project
2009-2013
"Next Generation Energy-Harvesting Electronics: A Holistic Approach"[Theme B Summary] - RelCel Project
2009-2012
"Reliable Cell design methods for variable processes"[Final Report] - VERDAD Project
2009-2012
"VERification-Driven Asynchronous Design" - SURE Project
2007-2010
"SecURE Design Flow"[Final Report] - STEP Project
2007-2010
"Self-Timed Event Processor"[Final Report] - SEDATE Project
2006-2009
"SElf-timed DATapath synthEsis" - SYRINGE Project
2005-2008
"Synchronizer Reliability in the Next Generation of SoC with Multiple Clocks"[Final Report] - NEGUS Project
2005-2008
"NExt Generation of interconnection technology for mUltiprocessor Soc"[Final Report] - SCREEN Project - [Publications]
2004-2006
"SeCuRE circuit dEsigN"[Final Report] - STELLA Project
2003-2006
"Synthesis & TEsting of Low-Latency Asynchronous circuits"[Final Report] - COHERENT Project - [Publications]
2001-2004
"COmputational HEteRogEneously timed NeTworks"[Final Report] - BESST Project
2001-2004
"Behavioural Synthesis of Systems with Heterogeneous Timing"[Final Report] - MOVIE Project
2000-2003
"Model Visualisation for Asynchronous Circuit Design"[Final Report] - BREACH Project
2000-2001
"Behavioural REfinements for Asynchronous Circuit syntHesis"[Final Report] - COMFORT Project - [Publications]
1998-2001
"asynchronous COmmunication Mechanisms FOr Real-Time systems"[Final Report] - DENT Project
1998-2000
"Dependable Embedded system design with petri NeTs" - TIMBRE Project
1997-2000
"Time-Predicatable Hardware Platforms"[Final Report] - ASTI Project
1997-1999
"Asynchronous Circuit Synthesis and Testing"[Final Report] - HADES Project
1996-1999
"Hazard-free Arbiter DESign"[Final Report] - "Asynchronous Circuit Design"
1996-1999
- ASAP Project
1994-1997
"Automated Synthesis of Synchronous and Asynchronous Parallel Controllers" - "Automated Synthesis of Asynchronous Control Circuits"
1994-1995
- "Design of Reliable Asynchronous Controllers and Interfaces"
1993-1996
Electrical and Electronic Engineering, School of Engineering
School of Computing
Last modified 09/10/2022 by IGC